SONOS - Wikipedia
Junction-Less Stackable SONOS Memory Realized on Vertical-Si-Nanowire for 3-D Application
SONOS Split-Gate eFlash Memory | SpringerLink
Fabrication and characterization of fin SONOS flash memory with separated double-gate structure - ScienceDirect
Removed processor/memory specs new devices from website.... : r/sonos
SONOS NOR Flash | CAES
Scalable SONOS based embedded non-volatile memory technology | Semiconductor Digest
PDF) Technology CAD of non-volatile SONOS memory devices | Satya Sopan Mahato - Academia.edu
a) Cross-sectional scheme of Si-NCs SONOS memory structure with the... | Download Scientific Diagram
A SONOS device with a separated charge trapping layer for improvement of charge injection
Floadia Develops Memory Technology That Retains Ultra-high-precision Analog Data for Extended Periods | TechPowerUp
CAES Introduces Family of Radiation Hardened NOR Flash Memories for Space FPGAs
TCAD Simulation of a SONOS Device with Silvaco's new FNONOS Model - Silvaco
Advantages of SONOS memory for embedded flash technology - EE Times
A junctionless SONOS nonvolatile memory device constructed with in situ-doped polycrystalline silicon nanowires | Nanoscale Research Letters | Full Text
A look at the latest developments in non-volatile memory
Visible Light-Erasable Oxide FET-Based Nonvolatile Memory Operated with a Deep Trap Interface | ACS Applied Materials & Interfaces
Device-aware inference operations in SONOS non-volatile memory arrays [Presentation]
Schematics of the conventional FG memory and SONOS. Schematics of (a)... | Download Scientific Diagram
SONOS Technology
Scalable SONOS based embedded non-volatile memory technology | Semiconductor Digest
Toshiba's Cortex-M MCU roadmap includes SONOS memory
Figure 1 from Characteristics of SONOS-Type Flash Memory With In Situ Embedded Silicon Nanocrystals | Semantic Scholar
Charge trapping NVMs with metal oxides in the memory stack - ScienceDirect
